1. Field of the Invention
The invention relates generally to apparatus and method for evaluating semiconductors, and more particularly to apparatus and method for measuring the registration and critical dimension (CD) of deposited layers.
2. Description of the Related Art
The need for faster and faster semiconductor integrated circuits (IC) has resulted in a decrease in the size of electronic elements formed on semiconductors, such as transistors and conductive paths. As a result, process variations during manufacture of semiconductors must be more accurately measured and more tightly controlled.
A typical integrated circuit is formed on a substrate wafer made of silicon or another semiconductor, such as gallium arsenide (GaAs) and indium phosphide (InP). The substrate then undergoes various processes such as layering, oxidation, etching, and doping in order to form transistors and conductive paths thereon. Layering typically includes depositing layers of silicon or metal on the semiconductor.
The processes of etching and doping typically include coating the surface of the semiconductor with a photoresist compound; exposing the photoresist compound to light passing through a mask to either harden or soften areas of the compound according on the nature of the photoresist compound; removing soft areas of the photoresist compound; etching or doping the areas of the semiconductor not covered by photoresist compound; and, finally, stripping the cured photo resist from the semiconductor. After doping, etching, or layering, the semiconductor may also undergo polishing, such as chemical mechanical polishing (CMP), wherein wafer surfaces are polished to maintain wafer flatness during processing
Each step in the process may have random variation, which in turn may cause variation in the performance of the finished semiconductor. Accordingly, at various stages in the manufacture of a semiconductor, the registration and critical dimension (CD or CD SEM) of the various elements forming the semiconductor may be measured. Registration, or overlay, is a measurement of the alignment of the mask used to create a pattern of lit and unlit portions on the photoresist compound. Misalignment of the mask may cause problems, such as short circuiting, interrupted conduction pathways, or malformed transistors. Another measurement is the CD—a measure of a linear dimension of an element forming part of an integrated circuit, such as a series of parallel lines. Variation in the CD may result in conductive paths that are too wide, bridging into neighboring conductive paths and causing a short circuit. If the conductive paths are too small, the increased resistance will degrade the processing speed of the completed IC.
Referring to FIG. 1, in prior systems, scanning electron microscopes (SEM) have been used to measure CD. However, an SEM is extremely expensive. Due to the expense of the SEM, a separate registration tools is often used to measure registration in order to maximize use of the SEM. A separate, less expensive registration tool is used to measure registration due to the reduced need for precision. Scatterometry tools have been used in recent years to measure CD in the optical disk fabrication industries. Scatterometry tools are capable of very fast and very accurate measurements and are less expensive than an SEM. In typical applications, a test mark 100 is formed on the disk comprising a grating of vertical lines 102 and a grating of horizontal lines 104. A scatterometry tool measures attributes reflected from the gratings in order to determine the width of the lines.
Referring to FIG. 2, in prior systems a separate registration mark 200 is formed on a semiconductor comprising outer marks 202 corresponding to one layer of deposited material and inner marks 204 corresponding to a second layer of material. By comparing the location of the marks 202, 204, the registration tool is capable of measuring errors in registration between the layers.
The foregoing measurement process requires two expensive tools: an SEM and a registration tool. In addition, the foregoing inspection process requires that a silicon wafer be mounted and dismounted in the two different tools. This introduces expense, delay, and risk of breakage into the manufacturing process.
Accordingly, it would be an advancement in the art to provide a test mark enabling accurate measurement of both CD SEM and registration with a single tool. It would be a further advancement if the test mark were measurable by a scatterometry tool.